In this paper, we present first-ever optimized hardware implementation of a state-of-the-art neuromorphic approach Histogram of Averaged Time Surfaces (HATS) algorithm to event-based object classification in FPGA for asynchronous time-based image sensors (ATIS). Our Implementation achieves latency of 3.3 ms for the N-CARS dataset samples and is capable of processing 2.94 Mevts/s. Speed-up is achieved by using parallelism in the design and multiple Processing Elements can be added. As development platform, Zynq-7000 SoC from Xilinx is used. The tradeoff between Average Absolute Error and Resource Utilization for fixed precision implementation is analyzed and presented. The proposed FPGA implementation is $\sim$ 32 x power efficient compared to software implementation.

翻译：本文首次提出了针对异步时间图像传感器（ATIS）的事件驱动目标识别中，基于前沿神经形态方法——平均时间曲面直方图（HATS）算法的优化硬件实现方案。该实现对于N-CARS数据集样本的延迟为3.3毫秒，且处理能力可达294万事件/秒。通过在设计中使用并行化技术并添加多个处理单元，实现了速度提升。开发平台选用赛灵思公司的Zynq-7000片上系统。本文分析并展示了定点实现中平均绝对误差与资源利用率之间的权衡关系。所提出的FPGA实现相比软件实现的能效提升约为32倍。