Domain-specific hardware to solve computationally hard optimization problems has generated tremendous excitement. Here, we evaluate probabilistic bit (p-bit) based Ising Machines (IM) on the 3-regular 3-Exclusive OR Satisfiability (3R3X), as a representative hard optimization problem. We first introduce a multiplexed architecture that emulates all-to-all network functionality while maintaining highly parallelized chromatic Gibbs sampling. We implement this architecture in single Field-Programmable Gate Arrays (FPGA) and show that running the adaptive parallel tempering algorithm demonstrates competitive algorithmic and prefactor advantages over alternative IMs by D-Wave, Toshiba, and Fujitsu. We also implement higher-order interactions that lead to better prefactors without changing algorithmic scaling for the XORSAT problem. Even though FPGA implementations of p-bits are still not quite as fast as the best possible greedy algorithms accelerated on Graphics Processing Units (GPU), scaled magnetic versions of p-bit IMs could lead to orders of magnitude improvements over the state of the art for generic optimization.

翻译：专用硬件解决计算困难优化问题引发了巨大关注。本文以3-正则3-异或可满足性问题（3R3X）作为代表性困难优化问题，评估基于概率比特的伊辛机性能。我们首先提出一种复用架构，该架构在保持高度并行化色谱吉布斯采样的同时，实现了全连接网络功能。我们在单芯片现场可编程门阵列中实现该架构，并证明运行自适应并行回火算法时，相较于D-Wave、东芝和富士通的替代伊辛机方案，本架构在算法复杂度与前置系数方面均展现出竞争优势。我们还实现了高阶相互作用，该改进在不改变XORSAT问题算法复杂度的前提下优化了前置系数。尽管当前基于现场可编程门阵列的概率比特实现速度仍略逊于图形处理器加速的最佳贪心算法，但采用磁性材料规模化集成的概率比特伊辛机有望为通用优化问题带来数量级的性能突破。