In cryptographic algorithms, the constants to be multiplied by a variable can be very large due to security requirements. Thus, the hardware complexity of such algorithms heavily depends on the design architecture handling large constants. In this paper, we introduce an electronic design automation tool, called LEIGER, which can automatically generate the realizations of very large constant multiplications for low-complexity and high-speed applications, targeting the ASIC design platform. LEIGER can utilize the shift-adds architecture and use 3-input operations, i.e., carry-save adders (CSAs), where the number of CSAs is reduced using a prominent optimization algorithm. It can also generate constant multiplications under a hybrid design architecture, where 2-and 3-input operations are used at different stages. Moreover, it can describe constant multiplications under a design architecture using compressor trees. As a case study, high-speed Montgomery multiplication, which is a fundamental operation in cryptographic algorithms, is designed with its constant multiplication block realized under the proposed architectures. Experimental results indicate that LEIGER enables a designer to explore the trade-off between area and delay of the very large constant and Montgomery multiplications and leads to designs with area-delay product, latency, and energy consumption values significantly better than those obtained by a recently proposed algorithm.

翻译：在密码算法中，因安全需求，与变量相乘的常数可能极为庞大。因此，此类算法的硬件复杂度在很大程度上取决于处理大常数的设计架构。本文提出一种名为LEIGER的电子设计自动化工具，面向专用集成电路设计平台，能够自动生成适用于低复杂度与高速应用的超大规模常数乘法实现方案。LEIGER可采用移位加法架构，并利用三输入运算单元（即进位保留加法器CSA），通过高效优化算法减少CSA数量。该工具还能在混合设计架构下生成常数乘法，在该架构中，不同阶段分别使用二输入与三输入运算单元。此外，它还能在采用压缩树的设计架构中描述常数乘法。作为案例研究，本文以密码算法中的基础运算——高速蒙哥马利乘法为对象，将其常数乘法模块按所提架构实现。实验结果表明，LEIGER使设计者能够探索超大规模常数乘法与蒙哥马利乘法在面积与延迟间的权衡，并最终获得在面积-延迟积、延迟及能耗值上均显著优于近期所提算法的设计方案。