Processing-In-Memory (PIM) is a novel approach that augments existing DRAM memory chips with lightweight logic. By allowing to offload computations to the PIM system, this architecture allows for circumventing the data-bottleneck problem that affects many modern workloads. This work tackles the problem of how to build efficient software implementations of the Transactional Memory (TM) abstraction by introducing PIM-STM, a library that provides a range of diverse TM implementations for UPMEM, the first commercial PIM system. Via an extensive study we assess the efficiency of alternative choices in the design space of TM algorithms on this emerging architecture. We further quantify the impact of using different memory tiers of the UPMEM system (having different trade-offs for what concerns latency vs capacity) to store the metadata used by different TM implementations. Finally, we assess the gains achievable in terms of performance and memory efficiency when using PIM-STM to accelerate TM applications originally conceived for conventional CPU-based systems.

翻译：内存计算（PIM）是一种在现有DRAM内存芯片中集成轻量级逻辑的新型方法。通过允许将计算任务卸载至PIM系统，该架构可规避影响众多现代工作负载的数据瓶颈问题。本文针对如何在软件层面高效实现事务内存（TM）抽象这一难题，提出了PIM-STM——一个面向首个商用PIM系统UPMEM、提供多种TM实现方案的库。通过广泛研究，我们评估了在此新兴架构上TM算法设计空间中的多种备选方案的效率。进一步量化了UPMEM系统不同内存层级（在延迟与容量间存在不同权衡）存储不同TM实现元数据时的影响。最后，我们评估了将PIM-STM用于加速原本基于传统CPU系统设计的TM应用时，在性能和内存效率方面可实现的增益。