A number of companies recently worked together to release the new Open Compute Project MX standard for low-precision computation, aimed at efficient neural network implementation. In this paper, we describe and evaluate the first open-source FPGA implementation of the arithmetic defined in the standard. Our designs fully support all the standard's concrete formats for conversion into and out of MX formats and for the standard-defined arithmetic operations, as well as arbitrary fixed-point and floating-point formats. Certain elements of the standard are left as implementation-defined, and we present the first concrete FPGA-inspired choices for these elements, which we outline in the paper. Our library of optimized hardware components is available open source, and can be used to build larger systems. For this purpose, we also describe and release an open-source Pytorch library for quantization into the new standard, integrated with the Brevitas library so that the community can develop novel neural network designs quantized with MX formats in mind. We demonstrate the usability and efficacy of our libraries via the implementation of example neural networks such as ResNet-18 on the ImageNet ILSVRC12 dataset. Our testing shows that MX is very effective for formats such as INT5 or FP6 which are not natively supported on GPUs. This gives FPGAs an advantage as they have the flexibility to implement a custom datapath and take advantage of the smaller area footprints offered by these formats.

翻译：近期多家企业共同发布了面向低精度计算的新型开放计算项目MX标准，旨在实现高效的神经网络部署。本文描述并评估了该标准所定义运算的首个开源FPGA实现方案。我们的设计全面支持标准中所有具体格式的MX格式双向转换及标准定义的算术运算，同时兼容任意定点数与浮点数格式。该标准中部分要素被留作实现定义项，我们首次提出了受FPGA启发的具体设计方案，并在文中予以阐述。我们已将优化的硬件组件库开源发布，可用于构建更大规模的系统。为此，我们还开发并开源了集成Brevitas库的PyTorch量化工具库，支持将神经网络量化至新标准格式，以助力学界开发基于MX量化格式的新型神经网络架构。通过在ImageNet ILSVRC12数据集上实现ResNet-18等示例神经网络，我们验证了工具库的实用性与有效性。测试表明MX标准对INT5或FP6等GPU原生不支持的格式具有显著优势，这使得FPGA能够通过定制数据通路并利用这些格式的紧凑面积特性，展现出独特的灵活性优势。