Careful design of semiconductor manufacturing equipment is crucial for ensuring the performance, yield, and reliability of semiconductor devices. Despite this, numerical optimization methods are seldom applied to optimize the design of such equipment due to the difficulty of obtaining accurate simulation models. In this paper, we address a practical and industrially relevant electrostatic chuck (ESC) design optimization problem by proposing a novel multi-fidelity surrogate modeling approach. The optimization aims to improve the temperature uniformity of the wafer during the etching process by adjusting seven parameters associated with the coolant path and embossing. Our approach combines low-fidelity (LF) and high-fidelity (HF) simulation data to efficiently predict spatial-field quantities, even with a limited number of data points. We use proper orthogonal decomposition (POD) to project the spatially interpolated HF and LF field data onto a shared latent space, followed by the construction of a multi-fidelity kriging model to predict the latent variables of the HF output field. In the ESC design problem, with hundreds or fewer data, our approach achieves a more than 10% reduction in prediction error compared to using kriging models with only HF or LF data. Additionally, in the ESC optimization problem, our proposed method yields better solutions with improvements in all of the quantities of interest, while requiring 20% less data generation cost compared to the HF surrogate modeling approach.

翻译：半导体制造设备的精心设计对于确保半导体器件的性能、良率和可靠性至关重要。尽管如此，由于难以获得精确的仿真模型，数值优化方法很少被用于优化此类设备的设计。本文通过提出一种新型多保真度代理建模方法，解决了一个具有实际工业意义的静电吸盘设计优化问题。该优化旨在通过调整与冷却剂路径和压花相关的七个参数，来改善蚀刻过程中晶圆的温度均匀性。我们的方法结合了低保真度与高保真度仿真数据，即使在数据点数量有限的情况下，也能有效预测空间场量。我们使用本征正交分解将空间插值后的高保真度与低保真度场数据投影到一个共享的潜在空间，然后构建一个多保真度克里金模型来预测高保真度输出场的潜在变量。在静电吸盘设计问题中，使用数百或更少的数据点，与仅使用高保真度或低保真度数据的克里金模型相比，我们的方法实现了超过10%的预测误差降低。此外，在静电吸盘优化问题中，我们提出的方法在减少20%数据生成成本的同时，得到了在所有关注量上均有改进的更好解，相较于高保真度代理建模方法。