Emerging non-volatile memory (NVM)-based Computing-in-Memory (CiM) architectures show substantial promise in accelerating deep neural networks (DNNs) due to their exceptional energy efficiency. However, NVM devices are prone to device variations. Consequently, the actual DNN weights mapped to NVM devices can differ considerably from their targeted values, inducing significant performance degradation. Many existing solutions aim to optimize average performance amidst device variations, which is a suitable strategy for general-purpose conditions. However, the worst-case performance that is crucial for safety-critical applications is largely overlooked in current research. In this study, we define the problem of pinpointing the worst-case performance of CiM DNN accelerators affected by device variations. Additionally, we introduce a strategy to identify a specific pattern of the device value deviations in the complex, high-dimensional value deviation space, responsible for this worst-case outcome. Our findings reveal that even subtle device variations can precipitate a dramatic decline in DNN accuracy, posing risks for CiM-based platforms in supporting safety-critical applications. Notably, we observe that prevailing techniques to bolster average DNN performance in CiM accelerators fall short in enhancing worst-case scenarios. In light of this issue, we propose a novel worst-case-aware training technique named A-TRICE that efficiently combines adversarial training and noise-injection training with right-censored Gaussian noise to improve the DNN accuracy in the worst-case scenarios. Our experimental results demonstrate that A-TRICE improves the worst-case accuracy under device variations by up to 33%.

翻译：新兴的基于非易失性存储器（NVM）的存内计算（CiM）架构因其卓越的能效优势，在加速深度神经网络（DNN）方面展现出巨大潜力。然而，NVM器件易受器件偏差的影响，导致映射到NVM器件上的实际DNN权重与目标值产生显著差异，从而引发严重的性能退化。现有许多解决方案旨在优化器件偏差下的平均性能，这适用于通用场景。然而，对于安全关键系统至关重要的最坏情况性能在当前研究中被严重忽视。本研究定义了受器件偏差影响的CiM DNN加速器最坏情况性能的定位问题，并提出了一种策略，用于在复杂的高维度值偏差空间中识别导致该最坏情况结果的特定器件值偏差模式。研究结果表明，即使是微小的器件偏差也可能导致DNN精度急剧下降，对CiM平台支持安全关键应用构成风险。值得注意的是，我们观察到现有提升CiM加速器中平均DNN性能的技术在增强最坏情况性能方面效果有限。针对这一问题，我们提出了一种名为A-TRICE的新型最坏情况感知训练技术，该技术通过高效结合对抗训练和基于右删失高斯噪声的噪声注入训练，以提升最坏情况下的DNN精度。实验结果表明，A-TRICE可将器件偏差下的最坏情况精度提升高达33%。