Low-resolution analog-to-digital converters (ADCs) in massive multi-user (MU) multiple-input multiple-output (MIMO) wireless systems can significantly reduce the power, cost, and interconnect data rates of infrastructure basestations. Thus, recent research on the theory and algorithm sides has extensively focused on such architectures, but with idealistic quantization models. However, real-world ADCs do not behave like ideal quantizers, and are affected by fabrication mismatches. We analyze the impact of capacitor-array mismatches in successive approximation register (SAR) ADCs, which are widely used in wireless systems. We use Bussgang's decomposition to model the effects of such mismatches, and we analyze their impact on the performance of a single ADC. We then simulate a massive MU-MIMO system to demonstrate that capacitor mismatches should not be ignored, even in basestations that use low-resolution SAR ADCs.

翻译：大规模多用户（MU）多输入多输出（MIMO）无线系统中采用低分辨率模数转换器（ADC）可显著降低基础设施基站的功耗、成本及互连数据速率。因此，近年来关于此类架构的理论与算法研究已广泛展开，但均基于理想化量化模型。然而，实际ADC的行为有别于理想量化器，且会受到制造失配的影响。本文针对无线系统中广泛使用的逐次逼近寄存器（SAR）型ADC，分析其电容阵列失配的影响。我们采用Bussgang分解对失配效应进行建模，并分析其对单个ADC性能的影响。随后通过大规模MU-MIMO系统仿真表明：即便在采用低分辨率SAR ADC的基站中，电容失配也不应被忽视。