The power consumption of the integrated circuit is becoming a significant burden, particularly for large-scale signal processing tasks requiring high throughput. The decoding process of LDPC codes is such a heavy signal processing task that demands power efficiency and higher decoding throughput. A promising approach to reducing both power and latency of a decoding process is to use an analog circuit instead of a digital circuit. This paper investigates a continuous-time gradient flow-based approach for decoding LDPC codes, which employs a potential energy function similar to the objective function used in the gradient descent bit flipping (GDBF) algorithm. We experimentally demonstrate that the decoding performance of the gradient flow decoding is comparable to that of the multi-bit mode GDBF algorithm. Since an analog circuit of the gradient flow decoding requires only analog arithmetic operations and an integrator, future advancements in programmable analog integrated circuits may make practical implementation feasible.

翻译：集成电路的功耗正成为显著负担，尤其是对需要高吞吐率的大规模信号处理任务而言。LDPC码的译码过程正是这样一项对功耗效率和译码吞吐率要求极高的繁重信号处理任务。降低译码过程功耗与延迟的一个有前景的方法是使用模拟电路替代数字电路。本文研究了一种基于连续时间梯度流的LDPC码译码方法，该方法采用了与梯度下降比特翻转（GDBF）算法中目标函数相似的势能函数。实验结果表明，梯度流译码的译码性能与多比特模式的GDBF算法相当。由于梯度流译码的模拟电路仅需模拟算术运算和一个积分器，未来可编程模拟集成电路的进步可能使其实际实现成为可能。