This paper proposes a novel way to assist conventional data address translation. The approach, PC-Indexed Data Address Translation (PCAX), uses the PC of a load instruction, and not a data virtual address, to obtain the page table entry (PTE) for the data accessed by a load instruction. PCAX is intended to be used for a small subset of the static loads in a program. We observe that: (i) a small subset of static loads is responsible for most of the misses in a data translation lookaside buffer (DTLB), and (ii) often a dynamic instance of a static load instruction accesses the same PTE as the last dynamic instance, and consider PCAX for this subset. With PCAX the effective miss rate of a conventional DTLB can be cut down by a factor of 2-3X in many cases, and even more in some cases. PCAX is also beneficial in reducing the number of secondary TLB (STLB) misses. Since the tables used for PCAX can be accessed alongside instruction fetch, they can be slow, yet frequently provide a valid PTE even before the data address calculation. This yields an average performance improvement of 1.7% while reducing data address translation energy by 7% across 84 server traces.

翻译：本文提出了一种辅助传统数据地址翻译的新方法。该方法名为"基于PC索引的数据地址翻译"(PC-Indexed Data Address Translation, PCAX)，它利用加载指令的程序计数器(PC)而非数据虚拟地址，来获取该加载指令所访问数据的页表项(PTE)。PCAX旨在用于程序中静态加载指令的一个小子集。我们观察到：(i) 一小部分静态加载指令导致了数据转换后备缓冲区(DTLB)中的大部分缺失；(ii) 静态加载指令的动态实例通常与上一次动态实例访问相同的PTE，因此我们针对这一子集采用PCAX。借助PCAX，传统DTLB的有效缺失率在许多情况下可降低2-3倍，某些情况下甚至更多。PCAX还有助于减少二级TLB(STLB)缺失次数。由于PCAX使用的表可以与指令获取并行访问，这些表访问速度可能较慢，但通常甚至能在数据地址计算之前就提供有效的PTE。在84个服务器跟踪记录中，该方法实现了平均1.7%的性能提升，同时将数据地址翻译能耗降低了7%。