To fully exploit the physics potential of current and future high energy particle colliders, machine learning (ML) can be implemented in detector electronics for intelligent data processing and acquisition. The implementation of ML in real-time at colliders requires very low latencies that are unachievable with a software-based approach, requiring optimization and synthesis of ML algorithms for deployment on hardware. An analysis of neural network inference efficiency is presented, focusing on the application of collider trigger algorithms in field programmable gate arrays (FPGAs). Trade-offs are evaluated between two frameworks, the SLAC Neural Network Library (SNL) and hls4ml, in terms of resources and latency for different model sizes. Results highlight the strengths and limitations of each approach, offering valuable insights for optimizing real-time neural network deployments at colliders. This work aims to guide researchers and engineers in selecting the most suitable hardware and software configurations for real-time, resource-constrained environments.

翻译：为充分挖掘当前及未来高能粒子对撞机的物理潜力，可在探测器电子学中部署机器学习（ML）以实现智能数据处理与采集。对撞机系统中实时ML应用需要极低延迟，这是基于软件的方法无法实现的，因此必须对ML算法进行优化与综合以部署于硬件平台。本文分析了神经网络推理效率，重点关注对撞机触发算法在现场可编程门阵列（FPGA）上的应用。通过对比SLAC神经网络库（SNL）与hls4ml两种框架在不同模型规模下的资源占用与延迟特性，评估了其性能权衡。研究结果揭示了两种方法各自的优势与局限，为优化对撞机实时神经网络部署提供了重要参考。本工作旨在指导研究人员和工程师在实时、资源受限环境下选择最适宜的硬件与软件配置方案。