To efficiently support Large Language Models (LLMs), modern GPGPU architectures have introduced new features and programming paradigms, such as warp specialization. These features enable temporal overlap between the producer and consumer, as well as between matrix multiplication and activation function operations, substantially improving performance. To conduct effective AI infrastructure and computer architecture research, cycle-accurate simulators that support these new features, together with analytical models that faithfully capture workload characteristics, are essential. However, existing academic tools provide limited support for these emerging requirements. Existing cycle-accurate simulators do not incorporate new NVIDIA GPU features, such as the Tensor Memory Accelerator (TMA), in a timely manner. Moreover, existing analytical models can misestimate DRAM traffic under certain configurations. In this paper, we build Sim-FA, a cycle-accurate simulation framework for Hopper TMA/WGMMA pipelines. We first develop an operator-agnostic trace frontend that instruments kernels at the Triton TTGIR level and validates it on 23 GEMM shapes, achieving 5.49\% MAPE against H800, confirming that the simulator core is not tied to any single operator. Because FlashAttention-3 introduces additional complexity beyond standard TMA/WGMMA kernels (asymmetric producer-consumer pipelines, softmax, ping-pong synchronization), we further build an FA3-specialized frontend that achieves 5.7\% MAPE with a maximum error of 12.7\%. Within the same framework, SimFA-python serves as an analytical fast path for large-scale design-space exploration where cycle-accurate simulation is prohibitively slow; validated against cuTile kernels on Blackwell (GB10), it explains why existing analytical models can produce inaccurate traffic estimates.

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