Today edge devices commonly connect to the cloud to use its storage and compute capabilities. This leads to security and privacy concerns about user data. Homomorphic Encryption (HE) is a promising solution to address the data privacy problem as it allows arbitrarily complex computations on encrypted data without ever needing to decrypt it. While there has been a lot of work on accelerating HE computations in the cloud, little attention has been paid to the message-to-ciphertext and ciphertext-to-message conversion operations on the edge. In this work, we profile the edge-side conversion operations, and our analysis shows that during conversion error sampling, encryption, and decryption operations are the bottlenecks. To overcome these bottlenecks, we present RISE, an area and energy-efficient RISC-V SoC. RISE leverages an efficient and lightweight pseudo-random number generator core and combines it with fast sampling techniques to accelerate the error sampling operations. To accelerate the encryption and decryption operations, RISE uses scalable, data-level parallelism to implement the number theoretic transform operation, the main bottleneck within the encryption and decryption operations. In addition, RISE saves area by implementing a unified en/decryption datapath, and efficiently exploits techniques like memory reuse and data reordering to utilize a minimal amount of on-chip memory. We evaluate RISE using a complete RTL design containing a RISC-V processor interfaced with our accelerator. Our analysis reveals that for message-to-ciphertext conversion and ciphertext-to-message conversion, using RISE leads up to 6191.19X and 2481.44X more energy-efficient solution, respectively, than when using just the RISC-V processor.
翻译:当今边缘设备通常连接至云端以利用其存储与计算能力,这引发了关于用户数据的安全与隐私问题。同态加密作为解决数据隐私问题的一种有前景的方案,能够在不需解密的情况下对加密数据执行任意复杂计算。尽管已有大量研究聚焦于云端加速同态加密计算,但边缘端消息-密文转换及密文-消息转换操作却鲜受关注。本文对边缘端转换操作进行了性能剖析,分析表明在转换过程中,误差采样、加密及解密操作是性能瓶颈。为突破这些瓶颈,我们提出了RISE——一款面积与能效优化的RISC-V SoC。RISE利用高效轻量级伪随机数生成器核心,结合快速采样技术加速误差采样操作;通过可扩展的数据级并行实现数论变换运算(加解密操作的主要瓶颈),以加速加密与解密过程。此外,RISE通过实现统一的加/解密数据通路节约面积,并高效利用内存复用与数据重排等技术,实现片上内存用量最小化。我们采用包含RISC-V处理器与加速器接口的完整RTL设计对RISE进行评估。分析表明,在消息-密文转换与密文-消息转换场景中,相较于仅使用RISC-V处理器,RISE可分别实现高达6191.19倍与2481.44倍的能效提升。