Majorana zero modes in superconductor-nanowire hybrid structures are a promising candidate for topologically protected qubits with the potential to be used in scalable structures. Currently, disorder in such Majorana wires is a major challenge, as it can destroy the topological phase and thus reduce the yield in the fabrication of Majorana devices. We study machine learning optimization of a gate array in proximity to a grounded Majorana wire, which allows us to reliably compensate even strong disorder. We propose a metric for optimization that is inspired by the topological gap protocol, and which can be implemented based on measurements of the non-local conductance through the wire.

翻译：超导体-纳米线混合结构中的Majorana零模是实现拓扑保护量子比特的有前景候选方案，具有用于可扩展结构的潜力。当前，此类Majorana线中的无序性是一个主要挑战，因为它会破坏拓扑相，从而降低Majorana器件的制备良率。我们研究了与接地的Majorana线邻近的门阵列的机器学习优化，该方法使我们能够可靠地补偿甚至强烈的无序性。我们提出了一种受拓扑间隙协议启发的优化度量，该度量可基于通过线的非局域电导测量来实现。