The rapid advancement of energy-efficient parallel ultra-low-power (ULP) ucontrollers units (MCUs) is enabling the development of autonomous nano-sized unmanned aerial vehicles (nano-UAVs). These sub-10cm drones represent the next generation of unobtrusive robotic helpers and ubiquitous smart sensors. However, nano-UAVs face significant power and payload constraints while requiring advanced computing capabilities akin to standard drones, including real-time Machine Learning (ML) performance and the safe co-existence of general-purpose and real-time OSs. Although some advanced parallel ULP MCUs offer the necessary ML computing capabilities within the prescribed power limits, they rely on small main memories (<1MB) and ucontroller-class CPUs with no virtualization or security features, and hence only support simple bare-metal runtimes. In this work, we present Shaheen, a 9mm2 200mW SoC implemented in 22nm FDX technology. Differently from state-of-the-art MCUs, Shaheen integrates a Linux-capable RV64 core, compliant with the v1.0 ratified Hypervisor extension and equipped with timing channel protection, along with a low-cost and low-power memory controller exposing up to 512MB of off-chip low-cost low-power HyperRAM directly to the CPU. At the same time, it integrates a fully programmable energy- and area-efficient multi-core cluster of RV32 cores optimized for general-purpose DSP as well as reduced- and mixed-precision ML. To the best of the authors' knowledge, it is the first silicon prototype of a ULP SoC coupling the RV64 and RV32 cores in a heterogeneous host+accelerator architecture fully based on the RISC-V ISA. We demonstrate the capabilities of the proposed SoC on a wide range of benchmarks relevant to nano-UAV applications. The cluster can deliver up to 90GOp/s and up to 1.8TOp/s/W on 2-bit integer kernels and up to 7.9GFLOp/s and up to 150GFLOp/s/W on 16-bit FP kernels.

翻译：高效能并行超低功耗微控制器单元的快速发展正在推动自主纳米级无人机的开发。这些尺寸小于10厘米的微型飞行器代表了下一代非侵入式机器人助手和泛在智能传感器。然而，纳米无人机在承受严苛功耗和载荷限制的同时，需要具备与标准无人机相当的先进计算能力，包括实时机器学习性能以及通用操作系统与实时操作系统的安全共存。尽管现有先进并行超低功耗微控制器能在规定功耗范围内提供所需的机器学习计算能力，但其依赖小型主存储器（<1MB）和不具备虚拟化或安全特性的微控制器级CPU，因此仅支持简单的裸机运行时环境。本文提出Shaheen——一款采用22nm FDX工艺实现的9mm²、200mW SoC。与现有先进微控制器不同，Shaheen集成了兼容v1.0批准版虚拟机扩展指令集并配备时序通道保护的、支持Linux运行的RV64核，同时通过低功耗低成本内存控制器向CPU直接暴露高达512MB的片外低成本低功耗HyperRAM。此外，该芯片还集成了完全可编程、高能效且面积优化的RV32核多核簇，该集群面向通用数字信号处理以及降低精度和混合精度的机器学习进行了优化。据作者所知，这是首个完整基于RISC-V指令集架构、以异构主从加速器架构耦合RV64与RV32核的超低功耗SoC硅原型。我们通过一系列面向纳米无人机应用的基准测试展示了该SoC的能力。该计算簇在2位整数内核上可实现高达90GOp/s性能和1.8TOp/s/W能效，在16位浮点内核上可实现高达7.9GFLOp/s性能和150GFLOp/s/W能效。