While non-volatile memories (NVMs) provide several desirable characteristics like better density and comparable energy efficiency than DRAM, DRAM-like performance, and disk-like durability, the limited endurance NVMs manifest remains a challenge with these memories. Indeed, the endurance constraints of NVMs can prevent solutions that are commonly employed for other mainstream memories like DRAM from being carried over as-is to NVMs. Specifically, in this work we observe that, Oblivious RAM (ORAM) primitive, the state-ofart solution to tackle memory bus side channel vulnerability, while widely studied for DRAMs, is particularly challenging to implement as-is for NVMs as it severely affects endurance of NVMs. This is so, as the inherent nature of ORAM primitive causes an order of magnitude increase in write traffic and furthermore, causes some regions of memory to be written far more often than others. This non-uniform write traffic as manifested by ORAM primitive stands to severely affect the lifetime of non-volatile memories (1% of baseline without ORAM) to even make it impractical to address this security vulnerability

翻译：尽管非易失性存储器（NVM）提供了比DRAM更好的密度和可比的能效、类DRAM性能以及类磁盘耐久性等优良特性，但NVM展现出的有限耐久性仍然是这类存储器面临的挑战。实际上，NVM的耐久性约束可能使得通常用于其他主流存储器（如DRAM）的解决方案无法直接迁移到NVM上。具体而言，在本工作中我们观察到，混淆随机存取存储器（ORAM）原语——解决内存总线侧信道漏洞的最先进方案，虽已在DRAM上得到广泛研究，但在NVM上直接实现尤为困难，因为它严重影响了NVM的耐久性。这是因为ORAM原语的内在特性会导致写流量增加一个数量级，并且使得内存的某些区域被写入的频率远高于其他区域。这种由ORAM原语引起的非均匀写流量将严重缩短非易失性存储器的寿命（降至无ORAM基线寿命的1%），甚至使得采用该方案解决安全漏洞变得不切实际。