Efficient arithmetic circuit design for resourceconstrained hardware involves challenging combinatorial optimization problems, among which Multiple Constant Multiplication (MCM) is a prominent example. MCM aims at implementing multiplications by fixed integer constants using bit-shifts and additions/subtractions but optimal methods are typically limited to moderately-sized constants, e.g. 12 bits. For practical applications targeting larger precision, Very large Constant Multiplication (VLCM) is solved instead. Existing approaches typically address VLCM through a heuristic flow that decomposes large constants into patterns, applies MCM optimization techniques on moderately-sized targets, and reconstructs the final result. This paper proposes multiple improvements to this flow: new declarative optimization models for the pattern selection and for the reconstruction, as well as applying recent optimal MCM models. The cornerstones of the obtained improvements are (i) allowing the patterns to overlap, minimising the number of unique target constants for the MCM step and (ii) performing the reconstruction step optimally, instead of heuristically. In addition, we propose a globally-optimal VLCM approach and characterize its limits. We employ a mix of constraint programming and SAT to solve each step. Experimental results on synthetic and real-life signal processing and cryptographic benchmarks, with coefficient word lengths ranging from tens to thousands of bits, demonstrate that the proposed approach scales to very large precisions and consistently outperforms existing baselines.

翻译：为资源受限硬件设计高效算术电路涉及具有挑战性的组合优化问题，其中多常数乘法（MCM）是一个典型示例。MCM旨在利用移位和加减法实现固定整数常数的乘法，但最优方法通常仅适用于中等规模的常数（如12位）。针对需要更高精度的实际应用，需解决超大型常数乘法（VLCM）问题。现有方法通常通过启发式流程处理VLCM：将大常数分解为模式，对中等规模目标应用MCM优化技术，并重构最终结果。本文对该流程提出多项改进：针对模式选择和重构的新声明式优化模型，以及应用最新最优MCM模型。改进的基石在于：（i）允许模式重叠，最小化MCM步骤中唯一目标常数的数量；（ii）以最优方式而非启发式方式执行重构步骤。此外，我们提出全局最优的VLCM方法并刻画其局限性。我们结合使用约束规划和SAT求解每个步骤。在合成数据及真实信号处理与密码学基准测试上的实验结果表明（系数位宽从数十位到数千位），所提方法可扩展到超大规模精度，并持续优于现有基线方法。