We present a fast generative modeling approach for resistive memories that reproduces the complex statistical properties of real-world devices. To enable efficient modeling of analog circuits, the model is implemented in Verilog-A. By training on extensive measurement data of integrated 1T1R arrays (6,000 cycles of 512 devices), an autoregressive stochastic process accurately accounts for the cross-correlations between the switching parameters, while non-linear transformations ensure agreement with both cycle-to-cycle (C2C) and device-to-device (D2D) variability. Benchmarks show that this statistically comprehensive model achieves read/write throughputs exceeding those of even highly simplified and deterministic compact models.

翻译：我们提出了一种用于电阻式存储器的快速生成建模方法，该方法能够再现真实器件的复杂统计特性。为实现模拟电路的高效建模，该模型采用Verilog-A语言实现。通过在集成1T1R阵列（512个器件的6000次循环）的广泛测量数据上进行训练，自回归随机过程精确地捕捉了开关参数之间的互相关性，同时非线性变换确保了与周期间（C2C）和器件间（D2D）变异的一致性。基准测试表明，这一统计全面的模型在读写吞吐量上甚至超过了高度简化的确定性紧凑模型。