Finite state machines (FSM's) are implemented with sequential circuits and are used to orchestrate the operation of hardware designs. Sequential obfuscation schemes aimed at preventing IP theft often operate by augmenting a design's FSM post-synthesis. Many such schemes are based on the ability to recover the FSM's topology from the synthesized design. In this paper, we present two tools which can improve the performance of topology extraction: RECUT, which extracts the FSM implementation from a netlist, and REFSM-SAT, which solves topology enumeration as a series of SAT problems. In some cases, these tools can improve performance significantly over current methods, attaining up to a 99\% decrease in runtime.

翻译：有限状态机（FSM）通过时序电路实现，用于协调硬件设计的运行。旨在防止知识产权窃取的顺序混淆方案，通常通过在综合后的设计上扩展FSM来运作。此类方案多依赖于从综合后的设计中恢复FSM拓扑结构的能力。本文提出两种可提升拓扑提取性能的工具：RECUT，用于从网表中提取FSM实现；以及REFSM-SAT，将拓扑枚举问题转化为一系列SAT问题进行求解。在某些情况下，这些工具相比现有方法可显著提升性能，运行时间最高可降低99%。