The computing industry is forced to find alternative design approaches and computing platforms to sustain increased power efficiency, while providing sufficient performance. Among the examined solutions, Approximate Computing, Hardware Acceleration, and Heterogeneous Computing have gained great momentum. In this Dissertation, we introduce design solutions and methodologies, built on top of the preceding computing paradigms, for the development of energy-efficient DSP and AI accelerators. In particular, we adopt the promising paradigm of Approximate Computing and apply new approximation techniques in the design of arithmetic circuits. The proposed arithmetic approximation techniques involve bit-level optimizations, inexact operand encodings, and skipping of computations, while they are applied in both fixed- and floating-point arithmetic. We also conduct an extensive exploration on combinations among the approximation techniques and propose a low-overhead scheme for seamlessly adjusting the approximation degree of our circuits at runtime. Based on our methodology, these arithmetic approximation techniques are then combined with hardware design techniques to implement approximate ASIC- and FPGA-based DSP and AI accelerators. Moreover, we propose methodologies for the efficient mapping of DSP/AI kernels on distinctive embedded devices, i.e., the space-grade FPGAs and the heterogeneous VPUs. On the one hand, we cope with the decreased flexibility of space-grade technology and the technical challenges that arise in new FPGA tools. On the other hand, we unlock the full potential of heterogeneity by exploiting all the diverse processors and memories. Based on our methodology, we efficiently map computer vision algorithms onto the radiation-hardened NanoXplore's FPGAs and accelerate DSP & CNN kernels on Intel's Myriad VPUs.

翻译：计算行业被迫寻找替代设计方法和计算平台，以在提供足够性能的同时持续提升能效。在现有解决方案中，近似计算、硬件加速和异构计算已获得极大发展势头。本论文基于上述计算范式，提出了用于开发高能效DSP与AI加速器的设计方案与方法论。具体而言，我们采用前景广阔的近似计算范式，并在算术电路设计中应用新型近似技术。所提出的算术近似技术涵盖位级优化、非精确操作数编码及计算跳过策略，这些技术同时应用于定点与浮点算术运算。我们还对近似技术的组合进行了广泛探索，并提出了一种低开销方案，可在运行时无缝调整电路近似程度。基于该方法论，我们将这些算术近似技术与硬件设计技术相结合，实现了基于ASIC和FPGA的近似DSP与AI加速器。此外，我们提出了在特定嵌入式设备（即航天级FPGA和异构VPU）上高效映射DSP/AI内核的方法论。一方面，我们解决了航天级技术灵活性下降以及新型FPGA工具中技术挑战的问题；另一方面，我们通过充分利用所有异构处理器和存储器，释放了异构性的全部潜力。基于该方法论，我们成功将计算机视觉算法高效映射到抗辐射的NanoXplore FPGA上，并在Intel的Myriad VPU上实现了DSP与CNN内核的加速。