Today's analog/mixed-signal (AMS) integrated circuit (IC) designs demand substantial manual intervention. The advent of multimodal large language models (MLLMs) has unveiled significant potential across various fields, suggesting their applicability in streamlining large-scale AMS IC design as well. A bottleneck in employing MLLMs for automatic AMS circuit generation is the absence of a comprehensive dataset delineating the schematic-netlist relationship. We therefore design an automatic technique for converting schematics into netlists, and create dataset AMSNet, encompassing transistor-level schematics and corresponding SPICE format netlists. With a growing size, AMSNet can significantly facilitate exploration of MLLM applications in AMS circuit design. We have made an initial set of netlists public, and will make both our netlist generation tool and the full dataset available upon publishing of this paper.

翻译：当今模拟/混合信号（AMS）集成电路（IC）设计需要大量人工干预。多模态大语言模型（MLLMs）的出现展现了其在各个领域的巨大潜力，表明其同样适用于简化大规模AMS IC设计流程。将MLLMs应用于AMS电路自动生成的一个瓶颈是缺乏描述原理图-网表关系的综合性数据集。为此，我们设计了一种将原理图自动转换为网表的技术，并创建了包含晶体管级原理图及其对应SPICE格式网表的数据集AMSNet。随着数据规模持续增长，AMSNet可显著促进MLLM在AMS电路设计中的探索应用。我们已公开首批网表数据，并将于论文发表后同步开放网表生成工具及完整数据集。