Accurate and low-latency qubit state measurement is critical for trapped-ion quantum computing. While deep neural networks (DNNs) have been integrated to enhance detection fidelity, their latency performance on specific hardware platforms remains underexplored. This work benchmarks the latency of DNN-based qubit detection on field-programmable gate arrays (FPGAs) and graphics processing units (GPUs). The FPGA solution directly interfaces an electron-multiplying charge-coupled device (EMCCD) with the subsequent data processing logic, eliminating buffering and interface overheads. As a baseline, the GPU-based system employs a high-speed PCIe image grabber for image input and I/O card for state output. We deploy Multilayer Perceptron (MLP) and Vision Transformer (ViT) models on hardware to evaluate measurement performance. Compared to conventional thresholding, DNNs reduce the mean measurement fidelity (MMF) error by factors of 1.8-2.5x (one-qubit case) and 4.2-7.6x (three-qubit case). FPGA-based MLP and ViT achieve nanosecond- and microsecond-scale inference latencies, while the complete single-shot measurement process achieves over 100x speedup compared to the GPU implementation. Additionally, clock-cycle-level signal analysis reveals inefficiencies in EMCCD data transmission via Cameralink, suggesting that optimizing this interface could further leverage the advantages of ultra-low-latency DNN inference, guiding the development of next-generation qubit detection systems.

翻译：精确且低延迟的量子比特状态测量对囚禁离子量子计算至关重要。尽管深度神经网络已被集成以提升检测保真度，但它们在特定硬件平台上的延迟性能仍未得到充分探索。本研究对基于现场可编程门阵列和图形处理单元的DNN量子比特检测方案进行了延迟基准测试。FPGA解决方案将电子倍增电荷耦合器件与后续数据处理逻辑直接接口，消除了缓冲与接口开销。作为基线，基于GPU的系统采用高速PCIe图像采集卡进行图像输入，并通过I/O卡输出状态。我们在硬件上部署多层感知机与Vision Transformer模型以评估测量性能。与传统阈值方法相比，DNN将平均测量保真度误差降低至1.8-2.5倍（单量子比特情形）和4.2-7.6倍（三量子比特情形）。基于FPGA的MLP和ViT分别实现纳秒级与微秒级推理延迟，而完整的单次测量过程较GPU实现获得超过100倍的加速比。此外，时钟周期级信号分析揭示了通过Cameralink传输EMCCD数据的低效性，表明优化该接口可进一步发挥超低延迟DNN推理的优势，为下一代量子比特检测系统的开发提供指导。