The reconfigurable intelligent surface (RIS) has received a lot of interest because of its capacity to reconfigure the wireless communication environment in a cost- and energy-efficient way. However, the realistic power consumption modeling and measurement validation of RIS has received far too little attention. Therefore, in this work, we model the power consumption of RIS and conduct measurement validations using various RISs to fill this vacancy. Firstly, we propose a practical power consumption model of RIS. The RIS hardware is divided into three basic parts: the FPGA control board, the drive circuits, and the RIS unit cells. The power consumption of the first two parts is modeled as $P_{\text {static}}$ and that of the last part is modeled as $P_{\text {units}}$. Expressions of $P_{\text {static}}$ and $P_{\text {units}}$ vary amongst different types of RISs. Secondly, we conduct measurements on various RISs to validate the proposed model. Five different RISs including the PIN diode, varactor diode, and RF switch types are measured, and measurement results validate the generality and applicability of the proposed power consumption model of RIS. Finally, we summarize the measurement results and discuss the approaches to achieve the low-power-consumption design of RIS-assisted wireless communication systems.

翻译：可重构智能表面（RIS）因其能以高性价比和节能的方式重新配置无线通信环境而备受关注。然而，目前对RIS的实际功耗建模与测量验证工作仍极为匮乏。为此，本文针对RIS的功耗进行建模，并利用多种RIS开展测量验证以填补这一空白。首先，我们提出一种实用的RIS功耗模型。将RIS硬件分为三个基本部分：FPGA控制板、驱动电路和RIS单元单元。前两部分的功耗建模为$P_{\text {static}}$，最后一部分的功耗建模为$P_{\text {units}}$。在不同类型的RIS中，$P_{\text {static}}$和$P_{\text {units}}$的表达式有所差异。其次，我们对多种RIS进行测量以验证所提模型。测量了包括PIN二极管、变容二极管和射频开关类型在内的五种不同RIS，测量结果验证了所提RIS功耗模型的通用性和适用性。最后，我们总结了测量结果，并讨论了实现RIS辅助无线通信系统低功耗设计的方法。