Spinal codes is a new family of capacity-achieving rateless codes that has been shown to achieve better rate performance compared to Raptor codes, Strider codes, and rateless Low-Density Parity-Check (LDPC) codes. This correspondence addresses the performance limitations of Spinal codes in the finite block length regime, uncovering an error floor phenomenon at high Signal-to-Noise Ratios (SNRs). We develop an analytical expression to approximate the error floor and devise SNR thresholds at which the error floor initiates. Numerical results across {Additive White Gaussian Noise (AWGN), rayleigh, and nakagami-m fading channels} verify the accuracy of our analysis. The analysis and numerical results also show that transmitting more passes of symbols can lower the error floor but does not affect the SNR threshold, providing insights on the performance target, the working SNR region, and the code design.
翻译:脊髓码是一种新型的容量逼近无速率码族,已被证明相较于Raptor码、Strider码以及无速率低密度奇偶校验(LDPC)码具有更优的速率性能。本文研究了脊髓码在有限码长体制下的性能限制,揭示了在高信噪比(SNR)条件下出现的差错平层现象。我们推导了近似计算差错平层的解析表达式,并确定了差错平层开始出现的SNR阈值。在{加性高斯白噪声(AWGN)、瑞利和Nakagami-m衰落信道}中的数值结果验证了分析的正确性。分析与数值结果同时表明,传输更多轮次的符号可以降低差错平层,但不会影响SNR阈值,这为性能目标、工作SNR区域及码设计提供了重要见解。