Turbo-Codes (TC) are a family of convolutional codes enabling Forward-Error-Correction (FEC) while approaching the theoretical limit of channel capacity predicted by Shannons theorem. One of the bottlenecks of a Turbo Encoder (TE) lies in the non-uniform interleaving stage. Interleaving algorithms require stalling the input vector bits before the bit rearrangement causing a delay in the overall process. This paper presents performance enhancement via a parallel algorithm for the interleaving stage of a Turbo Encoder application compliant with the DVB-RCS2 standard. The algorithm efficiently implements the interleaving operation while utilizing attributes of a given DSP. We will discuss and compare a serial model for the TE, with the presented parallel processed algorithm. Results showed a speed-up factor of up to 3.4 Total-Cycles, 4.8 Write and 7.3 Read.

翻译：Turbo码是一类能够逼近香农定理所预测信道容量理论极限的前向纠错卷积码。Turbo编码器的瓶颈之一在于其非均匀交织阶段。交织算法需要在比特重排前暂停输入向量比特，从而导致整体过程产生延迟。本文提出一种符合DVB-RCS2标准的并行算法，用于提升Turbo编码器交织阶段的性能。该算法在利用给定数字信号处理器特性的同时，高效实现了交织操作。我们将讨论并比较串行模型与所提并行处理算法。实验结果表明，该算法在总周期数、写入和读取操作上分别实现了高达3.4倍、4.8倍和7.3倍的加速比。