Increasing system-on-chip (SoC) heterogeneity, deep hardware/software integration, and the proliferation of third-party intellectual property (IP) have brought security validation to the forefront of semiconductor design. While simulation and formal verification remain indispensable, they often struggle to expose vulnerabilities that emerge only under realistic execution conditions, long software-driven interactions, and adversarial stimuli. In this context, hardware emulation is emerging as an increasingly important pre-silicon verification technology because it enables higher-throughput execution of RTL designs under realistic hardware/software workloads while preserving sufficient fidelity for security-oriented analysis. This paper presents a comprehensive survey and perspective on emulation-based security verification and validation. We organize the landscape of prior work across assertion-based security checking, coverage-driven exploration, adversarial testing, information-flow tracking, fault injection, and side-channel-oriented evaluation. We provide a structured view of emulation-enabled security verification workflows, including instrumentation, stimulus generation, runtime monitoring, and evidence-driven analysis. We also examine practical challenges related to observability, scalability, property specification, and the definition of security-oriented coverage metrics for emulation-based verification. Finally, we discuss emerging directions such as AI-assisted emulation, digital security twins, chiplet-scale security exploration, automated vulnerability assessment, and cloud-scale secure emulation. Overall, this paper positions emulation as a promising foundation for the next generation of pre-silicon hardware security assurance.

翻译：日益增长的片上系统（SoC）异构性、深度软硬件集成以及第三方知识产权（IP）的广泛使用，已将安全验证推至半导体设计的前沿。尽管仿真和形式化验证仍不可或缺，但它们往往难以揭示仅在真实执行条件、长时间软件驱动交互及对抗性刺激下才会暴露的漏洞。在此背景下，硬件仿真正成为一种日益重要的硅前验证技术，因为它能够在真实的硬件/软件工作负载下以更高吞吐量执行RTL设计，同时为安全导向分析保留足够保真度。本文对基于仿真的安全验证与确认进行了全面综述与展望。我们整理了先前工作在基于断言的安检查、覆盖驱动探索、对抗性测试、信息流追踪、故障注入以及侧信道评估等领域的研究全貌。我们提供了仿真支持的安全验证工作流的结构化视图，包括插桩、刺激生成、运行时监控和证据驱动分析。我们还探讨了与可观测性、可扩展性、属性规约以及为基于仿真的验证定义安全导向覆盖度量相关的实际挑战。最后，我们讨论了人工智能辅助仿真、数字安全孪生、芯粒级安全探索、自动化漏洞评估及云规模安全仿真等新兴方向。总体而言，本文将仿真定位为下一代硅前硬件安全保证的富有前景的基础。