The memory controller is in charge of managing DRAM maintenance operations (e.g., refresh, RowHammer protection, memory scrubbing) in current DRAM chips. Implementing new maintenance operations often necessitates modifications in the DRAM interface, memory controller, and potentially other system components. Such modifications are only possible with a new DRAM standard, which takes a long time to develop, leading to slow progress in DRAM systems. In this paper, our goal is to 1) ease, and thus accelerate, the process of enabling new DRAM maintenance operations and 2) enable more efficient in-DRAM maintenance operations. Our idea is to set the memory controller free from managing DRAM maintenance. To this end, we propose Self-Managing DRAM (SMD), a new low-cost DRAM architecture that enables implementing new in-DRAM maintenance mechanisms (or modifying old ones) with no further changes in the DRAM interface, memory controller, or other system components. We use SMD to implement new in-DRAM maintenance mechanisms for three use cases: 1) periodic refresh, 2) RowHammer protection, and 3) memory scrubbing. We show that SMD enables easy adoption of efficient maintenance mechanisms that significantly improve the system performance and energy efficiency while providing higher reliability compared to conventional DDR4 DRAM. A combination of SMD-based maintenance mechanisms that perform refresh, RowHammer protection, and memory scrubbing achieve 7.6% speedup and consume 5.2% less DRAM energy on average across 20 memory-intensive four-core workloads. We make SMD source code openly and freely available at https://github.com/CMU-SAFARI/SelfManagingDRAM.

翻译：内存控制器负责管理当前DRAM芯片中的维护操作（例如刷新、RowHammer防护、内存清洗）。实施新的维护操作通常需要对DRAM接口、内存控制器以及其他系统组件进行修改。这些修改唯有通过制定新的DRAM标准才能实现，而该过程耗时漫长，导致DRAM系统进展缓慢。本文的目标是：1）简化并加速新型DRAM维护操作的实施过程；2）实现更高效的DRAM内部维护操作。我们的核心理念是将内存控制器从DRAM维护管理中解放出来。为此，我们提出自管理DRAM（SMD）——一种新型低成本DRAM架构，该架构无需对DRAM接口、内存控制器或其他系统组件进行任何改动，即可实现新的DRAM内部维护机制（或修改现有机制）。我们利用SMD针对三种应用场景实现了新的DRAM内部维护机制：1）周期性刷新；2）RowHammer防护；3）内存清洗。研究表明，SMD能够轻松采用高效维护机制，与传统的DDR4 DRAM相比，在提供更高可靠性的同时显著提升系统性能与能效。采用基于SMD的刷新、RowHammer防护与内存清洗组合维护机制，在20个内存密集型四核工作负载中平均实现7.6%的性能加速，并降低5.2%的DRAM能耗。我们已在https://github.com/CMU-SAFARI/SelfManagingDRAM 公开提供SMD源代码。