A key challenge for ultra-low-power (ULP) devices is handling peripheral linking, where the main central processing unit (CPU) periodically mediates the interaction among multiple peripherals following wake-up events. Current solutions address this problem by either integrating event interconnects that route single-wire event lines among peripherals or by general-purpose I/O processors, with a strong trade-off between the latency, efficiency of the former, and the flexibility of the latter. In this paper, we present an open-source, peripheral-agnostic, lightweight, and flexible Peripheral Event Linking System (PELS) that combines dedicated event routing with a tiny I/O processor. With the proposed approach, the power consumption of a linking event is reduced by 2.5 times compared to a baseline relying on the main core for the event-linking process, at a low area of just 7 kGE in its minimal configuration, when integrated into a ULP RISC-V IoT processor.

翻译：超低功耗（ULP）设备面临的一个关键挑战是处理外设链接问题，即主中央处理单元（CPU）在唤醒事件发生后周期性地协调多个外设之间的交互。现有的解决方案要么通过集成事件互连结构在多个外设之间路由单线事件线路，要么采用通用I/O处理器，但这两种方法在延迟、效率（前者）与灵活性（后者）之间存在显著的权衡。本文提出一种开源、与外设无关、轻量级且灵活的Peripheral Event Linking System（PELS），该系统将专用事件路由与微型I/O处理器相结合。采用本文提出的方法，与依赖主核进行事件链接的基准方案相比，单个链接事件的功耗降低了2.5倍，且在集成到超低功耗RISC-V物联网处理器时，其最小配置仅需7千门等效门（kGE）的低面积开销。