In recent years, Field-Programmable Gate Arrays (FPGA) have evolved rapidly paving the way for a whole new range of computing paradigms. On the other hand, computer applications are evolving. There is a rising demand for a system that is general-purpose and yet has the processing abilities to accommodate current trends in application processing. This work proposes a design and implementation of a tightly-coupled FPGA-based dual-processor platform. We architect a platform that optimizes the utilization of FPGA resources and allows for the investigation of practical implementation issues such as cache design. The performance of the proposed prototype is then evaluated, as different configurations of a uniprocessor and a dual-processor system are studied and compared against each other and against published results for common industry-standard CPU platforms. The proposed implementation utilizes the Nios II 32-bit embedded soft-core processor architecture designed for the Altera Cyclone III family of FPGAs.

翻译：近年来，现场可编程门阵列（FPGA）发展迅速，为全新的计算范式铺平了道路。与此同时，计算机应用也在不断演进，对兼具通用性与处理能力以适应当前应用处理趋势的系统需求日益增长。本文提出了一种基于FPGA的紧耦合双处理器平台的设计与实现。我们构建了一个能够优化FPGA资源利用率并允许研究缓存设计等实际实现问题的平台。随后，对所提原型系统的性能进行了评估，研究了单处理器与双处理器系统的不同配置，并将它们相互比较，同时与已发布的通用行业标准CPU平台结果进行了对比。所提出的实现采用了为Altera Cyclone III系列FPGA设计的Nios II 32位嵌入式软核处理器架构。