Circuit representation learning is a promising research direction in the electronic design automation (EDA) field. With sufficient data for pre-training, the learned general yet effective representation can help to solve multiple downstream EDA tasks by fine-tuning it on a small set of task-related data. However, existing solutions only target combinational circuits, significantly limiting their applications. In this work, we propose DeepSeq, a novel representation learning framework for sequential netlists. Specifically, we introduce a dedicated graph neural network (GNN) with a customized propagation scheme to exploit the temporal correlations between gates in sequential circuits. To ensure effective learning, we propose to use a multi-task training objective with two sets of strongly related supervision: logic probability and transition probability at each node. A novel dual attention aggregation mechanism is introduced to facilitate learning both tasks efficiently. Experimental results on various benchmark circuits show that DeepSeq outperforms other GNN models for sequential circuit learning. We evaluate the generalization capability of DeepSeq on a downstream power estimation task. After fine-tuning, DeepSeq can accurately estimate power across various circuits under different workloads.

翻译：电路表示学习是电子设计自动化（EDA）领域一个前景广阔的研究方向。通过预训练获得充足的数据表征后，这种通用而有效的表示方法能够通过微调少量任务相关数据，解决多个下游EDA任务。然而现有方案仅针对组合电路，严重限制了其应用场景。本文提出DeepSeq——一种面向时序网表的创新表示学习框架。具体而言，我们引入带有定制化传播方案的专用图神经网络（GNN），以挖掘时序电路中门单元之间的时间关联性。为确保学习有效性，我们提出采用多任务训练目标，包含两类强相关监督信号：各节点的逻辑概率与状态转移概率。创新性双注意力聚合机制被引入以高效协同学习这两个任务。在多种基准电路上的实验结果表明，DeepSeq在时序电路学习任务中优于其他GNN模型。我们通过下游功耗估计任务评估了DeepSeq的泛化能力。经微调后，DeepSeq能在不同工作负载下准确估计各类电路的功耗。