Thermomechanical stress induced by through-silicon vias (TSVs) plays an important role in the performance and reliability analysis of 2.5D/3D ICs. While the finite element method (FEM) adopted by commercial software can provide accurate simulation results, it is very time- and memory-consuming for large-scale analysis. Over the past decade, the linear superposition method has been utilized to perform fast thermal stress estimations of TSV arrays, but it suffers from a lack of accuracy. In this paper, we propose MORE-Stress, a novel strict numerical algorithm for efficient thermal stress simulation of TSV arrays based on model order reduction. Extensive experimental results demonstrate that our algorithm can realize a 153-504 times reduction in computational time and a 39-115 times reduction in memory usage compared with the commercial software ANSYS, with negligible errors less than 1%. Our algorithm is as efficient as the linear superposition method, with an order of magnitude smaller errors and fast convergence.

翻译：硅通孔（TSV）引起的热机械应力在2.5D/3D集成电路的性能与可靠性分析中具有重要作用。虽然商业软件采用的有限元法（FEM）能够提供精确的模拟结果，但在大规模分析中非常耗时且占用大量内存。过去十年间，线性叠加方法被用于快速估算TSV阵列的热应力，但其精度不足。本文提出MORE-Stress，一种基于模型降阶的、用于TSV阵列高效热应力模拟的新型严格数值算法。大量实验结果表明，与商业软件ANSYS相比，我们的算法可实现153至504倍的计算时间缩减和39至115倍的内存使用缩减，且误差可忽略不计（小于1%）。本算法具有与线性叠加方法相当的高效性，同时误差降低一个数量级，并具备快速收敛特性。