We propose a novel constrained Bayesian Optimization (BO) algorithm optimizing the design process of Laterally-Diffused Metal-Oxide-Semiconductor (LDMOS) transistors while realizing a target Breakdown Voltage (BV). We convert the constrained BO problem into a conventional BO problem using a Lagrange multiplier. Instead of directly optimizing the traditional Figure-of-Merit (FOM), we set the Lagrangian as the objective function of BO. This adaptive objective function with a changeable Lagrange multiplier can address constrained BO problems which have constraints that require costly evaluations, without the need for additional surrogate models to approximate constraints. Our algorithm enables a device designer to set the target BV in the design space, and obtain a device that satisfies the optimized FOM and the target BV constraint automatically. Utilizing this algorithm, we have also explored the physical limits of the FOM for our devices in 30 - 50 V range within the defined design space.

翻译：针对横向扩散金属氧化物半导体（LDMOS）晶体管的设计过程，提出一种新型约束贝叶斯优化（BO）算法，该算法在实现目标击穿电压（BV）的同时优化晶体管设计。通过引入拉格朗日乘子，将约束贝叶斯优化问题转化为常规贝叶斯优化问题。不同于直接优化传统品质因数（FOM），我们将拉格朗日函数设定为贝叶斯优化的目标函数。这种采用可变拉格朗日乘子的自适应目标函数能够处理具有昂贵评估成本的约束贝叶斯优化问题，且无需额外构建代理模型来近似约束条件。该算法允许器件设计者在设计空间中设定目标击穿电压，并自动获得满足优化品质因数和目标击穿电压约束的器件。利用该算法，我们还在既定设计空间内探索了30-50 V电压范围内器件品质因数的物理极限。