Physical Unclonable Functions (PUFs) leverage manufacturing process imperfections that cause propagation delay discrepancies for the signals traveling along these paths. While PUFs can be used for device authentication and chip-specific key generation, strong PUFs have been shown to be vulnerable to machine learning modeling attacks. Although there is an impression that combinational circuits must be designed without any loops, cyclic combinational circuits have been shown to increase design security against hardware intellectual property theft. In this paper, we introduce feedback signals into traditional delay-based PUF designs such as arbiter PUF, ring oscillator PUF, and butterfly PUF to give them a wider range of possible output behaviors and thus an edge against modeling attacks. Based on our analysis, cyclic PUFs produce responses that can be binary, steady-state, oscillating, or pseudo-random under fixed challenges. The proposed cyclic PUFs are implemented in field programmable gate arrays, and their power and area overhead, in addition to functional metrics, are reported compared with their traditional counterparts. The security gain of the proposed cyclic PUFs is also shown against state-of-the-art attacks.

翻译：物理不可克隆函数（PUF）利用制造工艺中的 imperfections，导致信号沿路径传播时产生延迟差异。尽管PUF可用于设备认证和芯片专用密钥生成，但强PUF已被证明易受机器学习建模攻击。尽管存在一种印象——组合电路必须设计为无环路，但循环组合电路已被证明能增强设计安全性，抵御硬件知识产权盗用。本文在传统基于延迟的PUF设计（如仲裁器PUF、环形振荡器PUF和蝴蝶PUF）中引入反馈信号，使其输出行为范围更广，从而在对抗建模攻击时获得优势。基于我们的分析，循环PUF在固定挑战下产生的响应可以是二值、稳态、振荡或伪随机的。所提出的循环PUF在现场可编程门阵列中实现，并报告了其功耗和面积开销，同时与传统对应物相比展示了功能指标。此外，针对当前最先进的攻击，也展示了所提循环PUF的安全性增益。