The Embedded Trace Macrocell (ETM) is a standard component of Arm's CoreSight architecture, present in a wide range of platforms and primarily designed for tracing and debugging. In this work, we demonstrate that it can be repurposed to implement a novel hardware-assisted memory bandwidth regulator, providing a portable and effective solution to mitigate memory interference in real-time multicore systems. ETM2 requires minimal software intervention and bridges the gap between the fine-grained microsecond resolution of MemPol and the portability and reaction time of interrupt-based solutions, such as MemGuard. We assess the effectiveness and portability of our design with an evaluation on a large number of 64-bit Arm boards, and we compare ETM2 with previous works using a setup based on the San Diego Vision Benchmark Suite on the AMD Zynq UltraScale+. Our results show the scalability of the approach and highlight the design trade-offs it enables. ETM2 is effective in enforcing per-core memory bandwidth regulation and unlocks new regulation options that were infeasible under MemGuard and MemPol.

翻译：嵌入式跟踪宏单元（ETM）是Arm CoreSight架构的标准组件，广泛存在于各类平台中，主要用于跟踪和调试。本研究表明，可将其重新用于实现一种新颖的硬件辅助型内存带宽调控器，为实时多核系统中的内存干扰问题提供一种便携且有效的缓解方案。ETM2只需极少的软件干预，即可弥合 MemPol 微秒级精细粒度与基于中断的解决方案（如MemGuard）的便携性及响应时间之间的差距。我们通过大量64位Arm板卡评估了设计的有效性和可移植性，并基于圣迭戈视觉基准测试套件在AMD Zynq UltraScale+平台上将ETM2与先前工作进行了比较。实验结果展示了该方法的可扩展性，并揭示了其蕴含的设计权衡。ETM2能有效实施每核内存带宽调控，并解锁了在MemGuard和MemPol下难以实现的新型调控选项。