Today's data centers consist of thousands of network-connected hosts, each with CPUs and accelerators such as GPUs and FPGAs. These hosts also contain network interface cards (NICs), operating at speeds of 100Gb/s or higher, that are used to communicate with each other. We propose RecoNIC, an FPGA-based RDMA-enabled SmartNIC platform that is designed for compute acceleration while minimizing the overhead associated with data copies (in CPU-centric accelerator systems) by bringing network data as close to computation as possible. Since RDMA is the defacto transport-layer protocol for improved communication in data center workloads, RecoNIC includes an RDMA offload engine for high throughput and low latency data transfers. Developers have the flexibility to design their accelerators using RTL, HLS or Vitis Networking P4 within the RecoNIC's programmable compute blocks. These compute blocks can access host memory as well as memory in remote peers through the RDMA offload engine. Furthermore, the RDMA offload engine is shared by both the host and compute blocks, which makes RecoNIC a very flexible platform. Lastly, we have open-sourced RecoNIC for the research community to enable experimentation with RDMA-based applications and use-cases.

翻译：现代数据中心由数千个网络互联的主机组成，每个主机配备有CPU以及GPU、FPGA等加速器。这些主机还包含运行在100Gb/s或更高速度的网卡，用于彼此通信。我们提出RecoNIC——一种基于FPGA、支持RDMA的智能网卡平台，专为计算加速而设计，同时通过将网络数据尽可能靠近计算单元，最大限度地减少（在CPU为中心的加速器系统中）数据拷贝带来的开销。由于RDMA是数据中心工作负载中用于改进通信的事实标准传输层协议，RecoNIC集成了RDMA卸载引擎，可实现高吞吐量和低延迟的数据传输。开发者可以在RecoNIC可编程计算模块内，灵活地使用RTL、HLS或Vitis Networking P4设计加速器。这些计算模块能够通过RDMA卸载引擎访问主机内存以及远程对端的内存。此外，RDMA卸载引擎由主机和计算模块共享，这使得RecoNIC成为一个非常灵活的平台。最后，我们已将RecoNIC开源，供研究社区开展基于RDMA的应用及用例的相关实验。