Neuromorphic vision is a rapidly growing field with numerous applications in the perception systems of autonomous vehicles. Unfortunately, due to the sensors working principle, there is a significant amount of noise in the event stream. In this paper we present a novel algorithm based on an IIR filter matrix for filtering this type of noise and a hardware architecture that allows its acceleration using an SoC FPGA. Our method has a very good filtering efficiency for uncorrelated noise - over 99% of noisy events are removed. It has been tested for several event data sets with added random noise. We designed the hardware architecture in such a way as to reduce the utilisation of the FPGA's internal BRAM resources. This enabled a very low latency and a throughput of up to 385.8 MEPS million events per second.The proposed hardware architecture was verified in simulation and in hardware on the Xilinx Zynq Ultrascale+ MPSoC chip on the Mercury+ XU9 module with the Mercury+ ST1 base board.

翻译：神经地貌视觉是一个快速增长的领域,在自主车辆的感知系统中有许多应用。 不幸的是,由于传感器工作原理,事件流中出现了大量的噪音。 在本文中,我们展示了基于IR过滤这类噪音的新型算法,以及一个硬件结构,使这种噪音能够使用SoC FPGA加速。我们的方法对于与非气候有关的噪音具有非常好的过滤效率 — 超过99%的噪音事件已被清除。它已经用添加随机噪音来测试了多个事件数据集。我们设计硬件结构的方式减少了FPGA内部BRAM资源的利用率。这使得极低的悬浮度和吞吐量达到每秒385.8百万兆帕事件。 提议的硬件结构在与Mercury+ ST1基板的汞+ Xilinx Zynq Ultrascale+ MPSoC 芯片上进行了模拟和硬件核查。