Systolic array has emerged as a prominent architecture for Deep Neural Network (DNN) hardware accelerators, providing high-throughput and low-latency performance essential for deploying DNNs across diverse applications. However, when used in safety-critical applications, reliability assessment is mandatory to guarantee the correct behavior of DNN accelerators. While fault injection stands out as a well-established practical and robust method for reliability assessment, it is still a very time-consuming process. This paper addresses the time efficiency issue by introducing a novel hierarchical software-based hardware-aware fault injection strategy tailored for systolic array-based DNN accelerators.

翻译：脉动阵列已成为深度神经网络硬件加速器的主流架构，其高吞吐量和低延迟性能对于在各类应用中部署深度神经网络至关重要。然而，在安全关键型应用中，必须进行可靠性评估以确保深度神经网络加速器的正确行为。尽管故障注入作为可靠性评估中成熟、实用且稳健的方法备受认可，但其过程仍极为耗时。本文针对时间效率问题，提出了一种新颖的、基于层次化软件驱动的硬件感知故障注入策略，该策略专为基于脉动阵列的深度神经网络加速器定制。