With the rise of artificial intelligence, biological neuron models are being used to implement neural networks that can learn certain tasks after a training phase. One type of such networks are spiking neural networks (SNNs) that rely on a simplified model for biological neurons, the Integrate and Fire neuron. Several accelerators have emerged to implement SNNs with this kind of neuron. The ReckON system is one of these that allows both the training and execution of a recurrent SNN. The ReckON architecture, implemented on a custom ASIC, can be fully described using a hardware description language. In this work, we adapt the Verilog description to implement it on a Xilinx Multiprocessor System on Chip system (MPSoC). We present the circuits required for the efficient operation of the system, and a Python framework to use it on the Pynq ZU platform. We validate the architecture and implementation in two different scenarios, and show how the simulated accuracy is preserved with a peak performance of 3.8M events processed per second.

翻译：随着人工智能的兴起，生物神经元模型被用于实现可在训练阶段后学习特定任务的神经网络。其中一类网络是基于简化生物神经元模型——整合放电神经元的脉冲神经网络（SNN）。目前已涌现出多种采用此类神经元实现SNN的加速器。ReckON系统即为此类加速器之一，可支持递归SNN的训练与执行。该架构在专用集成电路（ASIC）上实现，可通过硬件描述语言进行完整描述。本研究将Verilog描述适配至赛灵思多处理器片上系统（MPSoC）平台，提出了保障系统高效运行所需的电路方案，并开发了基于Pynq ZU平台的Python框架进行应用。我们通过两种不同场景验证了架构与实现的正确性，结果表明仿真精度得以保持，且峰值处理性能达到每秒380万事件。