Local learning reduces cross-layer training dependencies, but an efficient accelerator must still retain operands, accumulate gradients, and select quantization scales. We present an FPGA system that trains a CNN and its regional auxiliary classifiers using a shared integer matrix engine. Compact errors are expanded on chip, gradients are folded tile by tile, and historical scales permit direct output conversion. At 200 MHz, the KV260 prototype achieves 76.57% accuracy on CIFAR-10 and 91.85% on SVHN at approximately 4.20 W mean module power. Effective matrix throughput is 31.22 and 31.57 GMAC/s, respectively. Against the same integer method on Jetson Orin Nano, measured training energy is 40.4% and 42.1% lower, with $1.86\times$ and $1.82\times$ longer runtime; measurements use the respective platform power domains. Selected state checks and matching complete-run prediction counts support functional agreement with the software reference.

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