Content addressable memory (CAM) stands out as an efficient hardware solution for memory-intensive search operations by supporting parallel computation in memory. However, developing a CAM-based accelerator architecture that achieves acceptable accuracy, while minimizing hardware cost and catering to both exact and approximate search, still presents a significant challenge especially when considering a broader spectrum of applications. This complexity stems from CAM's rapid evolution across multiple levels--algorithms, architectures, circuits, and underlying devices. This paper introduces CAMASim, a first comprehensive CAM accelerator simulation framework, emphasizing modularity, flexibility, and generality. CAMASim establishes the detailed design space for CAM-based accelerators, incorporates automated functional simulation for accuracy, and enables hardware performance prediction, by leveraging a circuit-level CAM modeling tool. This work streamlines the design space exploration for CAM-based accelerator, aiding researchers in developing effective CAM-based accelerators for various search-intensive applications.

翻译：内容可寻址存储器（Content Addressable Memory, CAM）通过支持内存内的并行计算，成为内存密集型搜索操作的高效硬件解决方案。然而，在实现可接受精度的同时最小化硬件成本，并兼顾精确搜索与近似搜索需求，开发基于CAM的加速器架构仍面临重大挑战，尤其当考虑更广泛的应用场景时。这一复杂性源于CAM在算法、架构、电路及底层器件等多层面的快速演进。本文提出CAMASim——首个综合性的CAM加速器仿真框架，强调模块化、灵活性与通用性。CAMASim构建了基于CAM的加速器详细设计空间，集成了用于精度评估的自动化功能仿真，并通过电路级CAM建模工具实现硬件性能预测。该工作简化了基于CAM的加速器设计空间探索，助力研究人员为各类搜索密集型应用开发高效的CAM加速器。