Graph Neural Networks (GNNs) are becoming a promising technique in various domains due to their excellent capabilities in modeling non-Euclidean data. Although a spectrum of accelerators has been proposed to accelerate the inference of GNNs, our analysis demonstrates that the latency and energy consumption induced by DRAM access still significantly impedes the improvement of performance and energy efficiency. To address this issue, we propose a Memory-Efficient GNN Accelerator (MEGA) through algorithm and hardware co-design in this work. Specifically, at the algorithm level, through an in-depth analysis of the node property, we observe that the data-independent quantization in previous works is not optimal in terms of accuracy and memory efficiency. This motivates us to propose the Degree-Aware mixed-precision quantization method, in which a proper bitwidth is learned and allocated to a node according to its in-degree to compress GNNs as much as possible while maintaining accuracy. At the hardware level, we employ a heterogeneous architecture design in which the aggregation and combination phases are implemented separately with different dataflows. In order to boost the performance and energy efficiency, we also present an Adaptive-Package format to alleviate the storage overhead caused by the fine-grained bitwidth and diverse sparsity, and a Condense-Edge scheduling method to enhance the data locality and further alleviate the access irregularity induced by the extremely sparse adjacency matrix in the graph. We implement our MEGA accelerator in a 28nm technology node. Extensive experiments demonstrate that MEGA can achieve an average speedup of 38.3x, 7.1x, 4.0x, 3.6x and 47.6x, 7.2x, 5.4x, 4.5x energy savings over four state-of-the-art GNN accelerators, HyGCN, GCNAX, GROW, and SGCN, respectively, while retaining task accuracy.

翻译：图神经网络（GNN）因在建模非欧几里得数据方面的卓越能力，正成为各领域颇具前景的技术。尽管已有多种加速器被提出用于加速GNN推理，但我们的分析表明，由DRAM访问引起的延迟和能耗仍然显著阻碍着性能与能效的提升。针对此问题，本文通过算法与硬件协同设计，提出了一种内存高效的GNN加速器（MEGA）。具体而言，在算法层面，通过对节点属性的深入分析，我们发现先前工作中的数据无关量化在精度与内存效率方面并非最优。这促使我们提出度数感知混合精度量化方法：根据节点的入度学习并分配适当的位宽，在保持精度的前提下尽可能压缩GNN模型。在硬件层面，我们采用异构架构设计，将聚合与组合阶段以不同数据流分别实现。为提升性能与能效，我们还提出了自适应打包格式以缓解细粒度位宽与多样化稀疏性带来的存储开销，以及压缩边调度方法以增强数据局部性并进一步缓解图中极端稀疏邻接矩阵导致的访问不规则性。我们在28nm工艺节点上实现了MEGA加速器。大量实验表明，与四种最先进的GNN加速器HyGCN、GCNAX、GROW和SGCN相比，MEGA在保持任务精度的同时，分别实现了平均38.3倍、7.1倍、4.0倍、3.6倍的加速比和47.6倍、7.2倍、5.4倍、4.5倍的能耗节省。