Chiplet architectures are a promising paradigm to overcome the scaling challenges of monolithic chips. Chiplets offer heterogeneity, modularity, and cost-effectiveness. The design space of chiplet architectures is huge as there are many degrees of freedom such as the number, size and placement of chiplets, the topology of the inter-chiplet interconnect and many more. Existing tools for cost and performance prediction are often too slow to explore this design space. We present RapidChiplet, a fast, open-source toolchain to predict latency and throughput of the inter-chiplet interconnect, as well as a chip's manufacturing cost and thermal stability.

翻译：芯片粒架构是克服单片芯片缩放挑战的一种有前景的范式。芯片粒具有异构性、模块化和成本效益优势。由于存在众多自由度，如芯片粒的数量、尺寸和布局、芯片间互连拓扑等，芯片粒架构的设计空间极为庞大。现有用于成本和性能预测的工具往往过于缓慢，难以支持对这一设计空间进行探索。我们提出了RapidChiplet——一个快速、开源的工具链，用于预测芯片间互连的延迟与吞吐量，以及芯片的制造成本和热稳定性。