Safety-critical domains, such as automotive, space, and robotics, are adopting increasingly powerful multicores with abundant hardware shared resources for higher performance and efficiency. However, mutual interference due to parallel operation within the SoC must be properly validated. Recently, the SafeTI traffic injector has been released and integrated in a homogeneous RISC-V multicore for testing, otherwise untestable casuistic for software-only solutions. This paper introduces some enhancements performed on the SafeTI, which include internal pipelining for higher-rate traffic injection, and its tailoring to multiple interfaces, as well as its integration in a more powerful heterogeneous RISC-V multicore based on Gaisler's technology for the space domain.

翻译：安全关键领域（如汽车、航天和机器人技术）正逐步采用日益强大的多核处理器，这些处理器配备丰富的共享硬件资源，以实现更高的性能和效率。然而，片上系统内并行运行产生的相互干扰必须得到充分验证。近期，SafeTI 流量注入器已被发布并集成到同构RISC-V多核处理器中，用于测试纯软件方案无法覆盖的复杂场景。本文介绍了对SafeTI 进行的若干增强工作，包括通过内部流水线实现更高频率的流量注入、针对多接口的定制化改造，以及将其集成到基于Gaisler航天领域技术的更强大异构RISC-V多核处理器中。