Recent advances in electronic and photonic technologies have allowed efficient signal generation and transmission at terahertz (THz) frequencies. However, as the gap in THz-operating devices narrows, the demand for terabit-per-second (Tbps)-achieving circuits is increasing. Translating the available hundreds of gigahertz (GHz) of bandwidth into a Tbps data rate requires processing thousands of information bits per clock cycle at state-of-the-art clock frequencies of digital baseband processing circuitry of a few GHz. This paper addresses these constraints and emphasizes the importance of parallelization in signal processing, particularly for channel code decoding. By leveraging structured sub-spaces of THz channels, we propose mapping bits to transmission resources using shorter code words, extending parallelizability across all baseband processing blocks. THz channels exhibit quasi-deterministic frequency, time, and space structures that enable efficient parallel bit mapping at the source and provide pseudo-soft bit reliability information for efficient detection and decoding at the receiver.

翻译：电子与光子技术的最新进展使得太赫兹频段的信号生成与传输得以高效实现。然而，随着太赫兹器件性能差距的缩小，对每秒太比特级电路的需求日益增长。要将数百吉赫兹的可用带宽转化为太比特级数据速率，需要在数字基带处理电路目前仅有数吉赫兹的时钟频率下，每个时钟周期处理数千个信息比特。本文针对这些限制因素展开研究，重点强调了信号处理中并行化的重要性，特别是信道译码环节。通过利用太赫兹信道的结构化子空间，我们提出采用更短的码字将比特映射至传输资源，从而将并行化能力扩展至所有基带处理模块。太赫兹信道在频率、时间和空间上呈现准确定性结构，这种特性允许在信源端实现高效并行比特映射，并为接收端的高效检测与译码提供伪软比特可靠性信息。