The frontier of quantum computing (QC) simulation on classical hardware is quickly reaching the hard scalability limits for computational feasibility. Nonetheless, there is still a need to simulate large quantum systems classically, as the Noisy Intermediate Scale Quantum (NISQ) devices are yet to be considered fault tolerant and performant enough in terms of operations per second. Each of the two main exact simulation techniques, state vector and tensor network simulators, boasts specific limitations. The exponential memory requirement of state vector simulation, when compared to the qubit register sizes of currently available quantum computers, quickly saturates the capacity of the top HPC machines currently available. Tensor network contraction approaches, which encode quantum circuits into tensor networks and then contract them over an output bit string to obtain its probability amplitude, still fall short of the inherent complexity of finding an optimal contraction path, which maps to a max-cut problem on a dense mesh, a notably NP-hard problem. This article aims at investigating the limits of current state-of-the-art simulation techniques on a test bench made of eight widely used quantum subroutines, each in 31 different configurations, with special emphasis on performance. We then correlate the performance measures of the simulators with the metrics that characterise the benchmark circuits, identifying the main reasons behind the observed performance trend. From our observations, given the structure of a quantum circuit and the number of qubits, we highlight how to select the best simulation strategy, obtaining a speedup of up to an order of magnitude.
翻译:量子计算(QC)在经典硬件上模拟的前沿正迅速逼近计算可行性的硬可扩展性极限。然而,由于含噪声中等规模量子(NISQ)设备在每秒运算能力上尚未达到容错且高性能的标准,我们仍需在经典平台上模拟大规模量子系统。两种主要精确模拟技术——状态向量模拟与张量网络模拟——各有其特定局限性。与当前可用量子计算机的量子比特寄存器规模相比,状态向量模拟的指数级内存需求会迅速饱和现有顶级HPC机器的容量。张量网络收缩方法将量子电路编码为张量网络,然后通过输出比特串收缩以获得其概率振幅,但该方法仍难以应对寻找最优收缩路径的固有复杂性——该问题可映射为密集网格上的最大割问题,属于典型的NP难问题。本文旨在通过一个由八种广泛使用的量子子程序(每种包含31种不同配置)组成的测试平台,重点探究当前最先进模拟技术的性能极限。我们将模拟器的性能指标与表征基准电路特征的度量进行关联,识别出观测性能趋势背后的主要原因。基于观测结果,根据量子电路的结构和量子比特数量,我们阐明了如何选择最优模拟策略,从而获得高达一个数量级的加速比。