Signal integrity (SI) analysis in printed circuit board (PCB) interconnects faces increasing complexity due to diverse integrated circuit (IC) buffer technologies, varying operating conditions, and manufacturing tolerances. Existing machine learning (ML) surrogate models for predicting SI metrics such as the inner eye contour, eye-height (EH), eye-width (EW), and transient waveform features typically rely on fixed buffer parameters, requiring costly new data generation and retraining cycles for every technology shift. This paper introduces a buffer-parameterized ML surrogate modeling methodology capable of handling cross-technology variations without retraining by treating IC buffer characteristics, e.g., clock frequency, supply voltage, rise/fall times, jitter, and internal resistors and capacitors, as dynamic model inputs alongside PCB parameters. To identify the optimal surrogate architecture for this high-dimensional space, a comprehensive benchmarking study compares tree-based methods (RFR/GBM), kernel methods (SVR/KRR), Gaussian process regression (GPR), and neural networks. The framework is subsequently validated on a complex interconnect with 44 design parameters. Results show that while anisotropic GPR excels in low-data regimes, neural networks heavily outperform other models on large datasets. Finally, the practical value of the ML surrogate models is demonstrated through a cross-technology design space exploration and optimization scenario, showcasing massive computational speedups for eye mask compliance checking compared to simulation.

翻译：针对印刷电路板互连中的信号完整性分析，复杂的集成电路缓冲器技术、多变的工作条件及制造公差导致其面临日益增长的复杂性。现有用于预测内眼图轮廓、眼高、眼宽及瞬态波形特征等信号完整性指标的机器学习代理模型，通常依赖固定缓冲器参数，每次技术切换时都需要代价高昂的新数据生成与重训练流程。本文提出一种基于缓冲器参数化的机器学习代理建模方法，通过将集成电路缓冲器特性（如时钟频率、电源电压、上升/下降时间、抖动、内部电阻与电容）与PCB参数共同作为动态模型输入，使其无需重训练即可处理跨技术变化。为确定高维空间中最优代理架构，本文开展了系统性基准研究，对比了基于树的方法（随机森林/梯度提升机）、核方法（支持向量回归/核岭回归）、高斯过程回归及神经网络。随后，该框架在一个包含44个设计参数的复杂互连上完成验证。结果表明：各向异性高斯过程回归在少量数据场景下表现优异，而神经网络在大型数据集上显著优于其他模型。最终，通过跨技术设计空间探索与优化案例，本文验证了机器学习代理模型的实践价值——相比于仿真，其眼图掩模合规性检查可实现数量级的计算加速。