While the role of Deep Neural Networks (DNNs) in a wide range of safety-critical applications is expanding, emerging DNNs experience massive growth in terms of computation power. It raises the necessity of improving the reliability of DNN accelerators yet reducing the computational burden on the hardware platforms, i.e. reducing the energy consumption and execution time as well as increasing the efficiency of DNN accelerators. Therefore, the trade-off between hardware performance, i.e. area, power and delay, and the reliability of the DNN accelerator implementation becomes critical and requires tools for analysis. In this paper, we propose a framework DeepAxe for design space exploration for FPGA-based implementation of DNNs by considering the trilateral impact of applying functional approximation on accuracy, reliability and hardware performance. The framework enables selective approximation of reliability-critical DNNs, providing a set of Pareto-optimal DNN implementation design space points for the target resource utilization requirements. The design flow starts with a pre-trained network in Keras, uses an innovative high-level synthesis environment DeepHLS and results in a set of Pareto-optimal design space points as a guide for the designer. The framework is demonstrated in a case study of custom and state-of-the-art DNNs and datasets.

翻译：尽管深度神经网络（DNN）在各类安全关键应用中的作用日益扩大，但新兴DNN在计算能力方面呈现出爆发式增长。这要求提升DNN加速器可靠性的同时，还需减轻硬件平台的计算负担，即降低能耗与执行时间，并提高DNN加速器的效率。因此，硬件性能（面积、功耗与延迟）与DNN加速器实现可靠性之间的权衡变得至关重要，亟需相应的分析工具。本文提出DeepAxe框架，该框架通过考量功能近似对精度、可靠性及硬件性能的三方影响，实现基于FPGA的DNN实现的设计空间探索。该框架可对可靠性关键的DNN进行选择性近似，针对目标资源利用率需求提供一组帕累托最优的DNN实现设计空间点。设计流程始于Keras中的预训练网络，借助创新的高层次综合环境DeepHLS，最终生成一组帕累托最优设计空间点作为设计者的指导依据。通过定制及当前最先进DNN与数据集的案例研究，对该框架进行了验证。