It is essential to select efficient topology of parameterized quantum circuits (PQCs) in variational quantum algorithms (VQAs). However, there are problems in current circuits, i.e. optimization difficulties caused by too many parameters or performance is hard to guarantee. How to reduce the number of parameters (number of single-qubit rotation gates and 2-qubit gates) in PQCs without reducing the performance has become a new challenge. To solve this problem, we propose a novel topology, called Block-Ring (BR) topology, to construct the PQCs. This topology allocate all qubits to several blocks, all-to-all mode is adopt inside each block and ring mode is applied to connect different blocks. Compared with the pure all-to-all topology circuits which own the best power, BR topology have similar performance and the number of parameters and 2-qubit gate reduced from 0(n^2) to 0(mn) , m is a hyperparameter set by ourselves. Besides, we compared BR topology with other topology circuits in terms of expressibility and entangling capability. Considering the effects of different 2-qubit gates on circuits, we also make a distinction between controlled X-rotation gates and controlled Z-rotation gates. Finally, the 1- and 2-layer configurations of PQCs are taken into consideration as well, which shows the BR's performance improvement in the condition of multilayer circuits.

翻译：在变分量子算法中，选择高效的参数化量子电路拓扑至关重要。然而，当前电路存在参数过多导致优化困难或性能难以保证的问题。如何在保证性能的前提下减少参数化量子电路中参数（单量子比特旋转门和双量子比特门的数量）的数量已成为新挑战。针对此问题，我们提出一种名为分块环（BR）的新型拓扑结构来构建参数化量子电路。该拓扑将所有量子比特分配到若干分块中，每个分块内部采用全连接模式，不同分块之间通过环模式连接。与具有最佳性能的纯全连接拓扑电路相比，BR拓扑在保持相似性能的同时，参数和双量子比特门数量从O(n²)降至O(mn)，其中m为自主设定的超参数。此外，我们从表达能力和纠缠能力角度将BR拓扑与其他拓扑电路进行了比较。考虑到不同双量子比特门对电路的影响，我们还对受控X旋转门和受控Z旋转门进行了区分。最后，本文还考虑了参数化量子电路的单层和双层配置，结果表明BR拓扑在多层级电路条件下具有性能优势。