In a zero-trust fabless paradigm, designers are increasingly concerned about hardware-based attacks on the semiconductor supply chain. Logic locking is a design-for-trust method that adds extra key-controlled gates in the circuits to prevent hardware intellectual property theft and overproduction. While attackers have traditionally relied on an oracle to attack logic-locked circuits, machine learning attacks have shown the ability to retrieve the secret key even without access to an oracle. In this paper, we first examine the limitations of state-of-the-art machine learning attacks and argue that the use of key hamming distance as the sole model-guiding structural metric is not always useful. Then, we develop, train, and test a corruptibility-aware graph neural network-based oracle-less attack on logic locking that takes into consideration both the structure and the behavior of the circuits. Our model is explainable in the sense that we analyze what the machine learning model has interpreted in the training process and how it can perform a successful attack. Chip designers may find this information beneficial in securing their designs while avoiding incremental fixes.

翻译：在零信任无晶圆厂模式下，设计者日益关注半导体供应链中的硬件攻击。逻辑锁定作为一种设计可信方法，通过在电路中添加额外的密钥控制门来防止硬件知识产权窃取和过度生产。尽管攻击者传统上依赖预言机攻击逻辑锁定电路，但机器学习攻击已展现出即使无法访问预言机也能检索密钥的能力。本文首先审视现有最佳机器学习攻击的局限性，论证仅将密钥汉明距离作为模型引导的结构度量并非始终有效。随后，我们开发、训练并测试了一种基于可污染性感知图神经网络的逻辑锁定无预言机攻击方法，该方法同时考虑了电路的结构与行为。我们的模型具有可解释性，能分析机器学习模型在训练过程中所理解的内容及其成功实施攻击的机制。芯片设计者可利用此信息在避免增量修补的同时增强设计安全性。