This paper explores the potential of communicating information gained by static analysis from compilers to Out-of-Order (OoO) machines, focusing on the memory dependence predictor (MDP). The MDP enables loads to issue without all in-flight store addresses being known, with minimal memory order violations. We use LLVM to find loads with no dependencies and label them via their opcode. These labelled loads skip making lookups into the MDP, improving prediction accuracy by reducing false dependencies. We communicate this information in a minimally intrusive way, i.e.~without introducing additional hardware costs or instruction bandwidth, providing these improvements without any additional overhead in the CPU. We find that in select cases in Spec2017, a significant number of load instructions can skip interacting with the MDP and lead to a performance gain. These results point to greater possibilities for static analysis as a source of near zero cost performance gains in future CPU designs.

翻译：本文探讨了将编译器通过静态分析获得的信息传递给乱序执行（OoO）机器的潜力，重点关注内存依赖预测器（MDP）。MDP使得加载指令能够在所有正在执行的存储地址尚未可知的情况下发出，同时将内存顺序违规降至最低。我们使用LLVM识别无依赖关系的加载指令，并通过其操作码对其进行标记。这些被标记的加载指令跳过对MDP的查询，通过减少错误依赖来提高预测准确性。我们以侵入性最小的方式传递此信息，即在不引入额外硬件成本或指令带宽的情况下，提供这些改进而不增加CPU的任何额外开销。我们发现，在Spec2017的特定案例中，大量加载指令可以跳过与MDP的交互，从而带来性能提升。这些结果表明，静态分析作为一种近乎零成本的性能提升来源，在未来CPU设计中具有更大的潜力。